1. Field of the Invention
The present invention generally relates to a CMOS sensor circuit and, more particularly, to a CMOS sensor circuit which restrains a blooming of a CMOS image sensor.
2. Description of the Related Art
An image sensor is used, in a television camera, etc., as a sensor converting externally obtained optical image information into an electrical signal, and comprises a multitude of pixels arranged in a matrix form. A MOS-type image sensor comprises a pixel circuit formed by a photodiode and a MOS-type FET, and has features of low electric power consumption, low cost, etc, as a CCD-type image sensor dominantly used in conventional technology.
FIG. 1A is a circuit diagram of a first conventional example of a CMOS sensor circuit. In FIG. 1A, 100 is a basic circuit of a CMOS inverter. 110 is a pixel circuit forming a pixel unit together with other pixel circuits. The CMOS inverter 100 comprises a PMOS transistor M4 and an NMOS transistor M6. Vrs is a control voltage (a reset control signal). The CMOS inverter 100 supplies a reset signal RST to a reset transistor M1 of the pixel circuit 110. When the reset control signal Vrs is high-level (H), the PMOS transistor M4 becomes off, and the NMOS transistor M6 becomes on, such that the reset signal RST becomes low-level (L). On the other hand, when the reset control signal Vrs is low-level (L), the PMOS transistor M4 becomes on, and the NMOS transistor M6 becomes off, such that the reset signal RST becomes high-level (H).
The pixel circuit 110 comprises the reset transistor M1, a source follower transistor M2, a select transistor M3, a photodiode PD, and a current source 15. A drain of the reset transistor M1 and a drain of the source follower transistor M2 are connected to a terminal of a reset voltage VR. A source of the reset transistor M1 and a gate of the source follower transistor M2 are connected to a cathode of the photodiode PD. An anode of the photodiode PD is grounded. A source of the source follower transistor M2 is connected to a drain of the select transistor M3.
When the reset signal RST becomes high-level (H), the reset transistor M1 supplies the reset voltage VR to the photodiode PD so as to reset the photodiode PD to an initial voltage. The source follower transistor M2 forms a source follower circuit together with the current source 15 so as to amplify a cathode voltage of the photodiode PD. When a select control signal SLCT becomes high-level (H), the select transistor M3 becomes on so as to connect the source follower transistor M2 to the current source 15, enabling a selective switch of an output voltage of the source follower transistor M2.
Next, a description will be given of operations of this conventional CMOS sensor circuit. When the CMOS inverter 100 is supplied with the reset control signal Vrs at a low-level (L), the PMOS transistor M4 becomes on, and the NMOS transistor M6 becomes off, such that the reset signal RST becomes high-level (H). When the high-level reset signal RST is supplied to a gate of the reset transistor M1, the reset transistor M1 becomes on. Thereby, the cathode of the photodiode PD is connected to the reset voltage VR such that a potential vpd at a node equals the reset voltage VR. Accordingly, electric charges accumulate in the photodiode PD so as to reset the pixel circuit 110. Then, when the reset signal RST becomes low-level (L), i.e., when a gate potential of the reset transistor M1 becomes low-level, the reset transistor M1 becomes off such that the photodiode PD is disconnected from the reset voltage VR.
In this state, when the photodiode PD receives a light, a photoelectric convert voltage is generated in the photodiode PD according to a level of the input light. Then, the source follower transistor M2 composing a source follower amplifies this photoelectric convert voltage. Subsequently, the select control signal SLCT is supplied to the select transistor M3 according to an arbitrary timing so as to output the signal amplified by the source follower transistor M2.
However, this first conventional example causes an issue of a blooming phenomenon. That is, when an intense light is applied to the photodiode PD such that the voltage of the photodiode PD decreases excessively as indicated by a shaded part in FIG. 1B, electrons overflow the photodiode PD, and flow out from the pixel circuit 110 through a substrate into peripheral pixel circuits (not shown in the figure) so as to influence peripheral photodiodes.
FIG. 2A is a circuit diagram of a second conventional example of a CMOS sensor circuit. A pixel circuit 120 shown in FIG. 2A is basically identical to the pixel circuit 110 shown in FIG. 1A, except that the pixel circuit 120 shown in FIG. 2A comprises an N-channel MOS transistor M4 so as to control the above-mentioned blooming. In this structure including the N-channel MOS transistor M4, a bias voltage VB is applied to a gate potential of the N-channel MOS transistor M4 so as to turn on the N-channel MOS transistor M4. This makes it possible for electric charges flown over the photodiode PD to escape to the terminal of the reset voltage VR so as to control the above-mentioned blooming (FIG. 2B).
However, in this second conventional example, the number of elements in each of the pixel circuits increases, and accordingly, an area occupied by each of pixels also enlarges. Therefore, when tens of thousands of pixels are arranged in an image sensor, the area occupied by all of the pixels are considerably enlarged so as to increase a chip size of the image sensor, leading to the increased costs. Additionally, the second conventional example incorporates one transistor while reducing a size of the photodiode so as to restrain the increase in area occupied by all of the pixels. In this case, the photodiode with a reduced size leads to a low sensitivity, or increases susceptibility to noises, which consequently aggravates a quality of images.